FormFactor Inc. Citi’s 2026 Global TMT Conference
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two of Citi's 2026 Global TMT Conference. My name is Elizabeth Sun. I am in the Citi's Semi and Semi Cap Research team here. With this session, we have FormFactor. We will have Mike Slessor, the CEO of FormFactor here on the stage. Welcome. We also have VP of IR, Stan, in the audience as well. Welcome both. Mike, on a high level, personally, I think it is a good time to invest in semi testing market. Maybe high level, can you talk about the trends we are seeing in, let us say, customers making more investment in the testing space overall, or maybe just probe cards specifically?
Yeah. First of all, thank you, Elizabeth, and thanks to Citi for having us. This is always a great conference coming out of summer to touch base with people and understand where the different data points in the industry that help inform our strategy as we go through the back part of the year. Thanks again for having us. It is a very good time to be in test in the semiconductor industry. Really, if I deconstruct it into the fundamental driver of that, it is a theme we have been sharing with people for the past several years that has been informing our strategy, and that is the adoption of advanced packaging or chiplets in constructing a lot of the advanced semiconductor products in the industry.
It turns out that breaking up a chip into chiplets puts a very high burden on testing, because before these chiplets then get reassembled into the final structure, our customers need very high certainty that each of those chiplets is good. Otherwise, they can end up with a scenario in something like an HBM stack where one of the 16 die actually causes the entire stack to be essentially scrapped and lost. So the burden for test has gone up, customer spending on test has gone up, and we see our markets and our business growing quite substantially, driven by that tailwind, which fundamentally has its roots in advanced packaging and chiplets.
Yeah, that makes sense. Before I get into each of the end markets, I want to ask about probe card's intensity overall. Historically, you talk about probe card intensity is about 0.4%. With semi sales growing rapidly, and partially I think that is because of pricing, but also there is a lot of new opportunities in what you call advanced probe cards in ASICs, GPUs, and other things. Are you expecting this so-called probe card intensity to grow over the next few years?
Yeah. It is a great question because, historically, what we have done is looked at probe card intensity and defined it as essentially the fraction of our customer's revenue that gets reinvested or spent on probe cards. As you note, although it has been growing, for the past couple of years, it has been around the 0.4% level. We see that distorting pretty substantially for two reasons. One is probe card spending, at least on a per unit basis, is going up, but it is not going up nearly as fast as some of the ASP increases in some of the end markets like DRAM. If you look at the ASPs for a DRAM chip, they have exploded. Although we are seeing increased spending on test, as we talked about, driven by advanced packaging, we are not seeing these spectacular increases in ASPs driven by some of the shortage like our customers are.
I would expect that definition to be pretty distorted here as we go through 2026 into 2027, given the industry pricing dynamic.
Yeah. No, that makes sense. I guess the more important part is per unit is growing.
Yeah. That is important. I want to ask about each specific end markets.
I want to start with custom ASICs, because I think that is kind of the newest into the advanced probe cards market. You talk about a couple of multi-million dollar projects, but it feels like more to come on that front.
Yeah. How should we think about the opportunities for the ASICs for advanced probe cards overall?
Then we can talk about computing.
Right. Well, ASICs, an interesting opportunity, and we are talking here about the custom ASICs, things like Google's TPU, AWS's Trainium. Essentially these very high-end compute chips or clusters of compute chips that are becoming one of the key elements of the overall high-performance silicon powering generative AI. We have highlighted for people some traction and some design wins over the past year or so. Those are really driven by the migration of these ASICs into a space that requires an advanced MEMS probe technology. This gets into the details of one of the ways FormFactor differentiates. We build each of the individual probes on a probe card. A probe card is this array of tens, if not hundreds of thousands of individual probes that contact the chip and transact electrical signals in and out of the chip.
We build each of those probes using a proprietary advanced MEMS technology, special metallurgy, special patterning, all vertically integrated inside our facility in Livermore, California, and our upcoming facility, which is beginning to ramp in Farmers Branch, Texas. The technologies we have invested in here really enable customers to drive higher current, higher speeds, operate at higher temperatures, and in some cases, lower temperatures. Custom ASICs are embarking in a region here where the power both consumed and produced by these chips is driving their performance envelope to an area where a MEMS probe with these advanced metallurgies and advanced structures is really required to do tests at a productive level, high uptimes, the kind of productivity our customers are used to. Up until now, legacy, essentially wire-based needle probe technologies have been sufficient.
We see custom ASICs really crossing this brink in 2027 and into 2028 of needing an advanced MEMS probe technology, again, to test in a productive, cost-effective way, much the same way GPUs did a few generations ago. Went through exactly the same transition for those interested in the history.
Yeah. Are we expecting all the new programs coming online in 2027 beyond to adopt this advanced MEMS probe cards, or it is going to be mixed?
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